ref: 74d520e8c85d8725aff11b423f0ba00fd3dd727d
parent: 2f51459d358787bb85dfbb87b004920aeaf625a1
author: Roberto E. Vargas Caballero <k0ga@shike2.com>
date: Fri Dec 29 04:53:27 EST 2017
[as-z80] Expand ld16() to all the cases The only case that is not handled in ld16() is SP instructions, because they create a lot of problems and at the end they are better handled with a noarg format.
--- a/as/target/x80/ins.c
+++ b/as/target/x80/ins.c
@@ -280,40 +280,6 @@
}
void
-r16_imm16(Op *op, Node **args)
-{
- Node *par1, *par2;
- unsigned char buf[4];
- int n = op->size;
- unsigned val;
-
- par1 = args[0];
- par2 = args[1];
-
- memcpy(buf, op->bytes, n);
- val = par2->sym->value;
- buf[n-1] = val >> 8;
- buf[n-2] = val;
- buf[n-3] |= reg2int(par1->sym->argtype) << 4;
- emit(buf, n);
-}
-
-void
-r16_dir(Op *op, Node **args)
-{
- Node *dir, *reg;
-
- if (args[1]->addr == ADIRECT)
- dir = args[1], reg = args[0];
- else
- dir = args[0], reg = args[1];
-
- args[0] = reg;
- args[1] = dir->left;
- r16_imm16(op, args);
-}
-
-void
alu16(Op *op, Node **args)
{
Node *par;
@@ -331,8 +297,32 @@
void
ld16(Op *op, Node **args)
{
- if (!args[1])
+ Node *dst, *src, *tmp;
+ int n = op->size;
+ unsigned val;
+ unsigned char buf[4];
+
+ dst = args[0];
+ src = args[1];
+ if (!src) {
alu16(op, args);
+ return;
+ }
+
+ if (dst->addr != AREG) {
+ tmp = src;
+ src = dst;
+ dst = tmp;
+ }
+
+ memcpy(buf, op->bytes, n);
+ if (src->addr == ADIRECT)
+ src = src->left;
+ val = src->sym->value;
+ buf[n-1] = val >> 8;
+ buf[n-2] = val;
+ buf[n-3] |= reg2int(dst->sym->argtype) << 4;
+ emit(buf, n);
}
void
--- a/as/target/x80/x80.dat
+++ b/as/target/x80/x80.dat
@@ -80,19 +80,19 @@
LD R,A 2 0xed,0x4f noargs Z80,R800
# 16 bit load group
-LD dd,imm16 3 0x01 r16_imm16 Z80,R800,GB80
-LD IX,imm16 4 0xdd,0x21 imm16 Z80,R800
-LD IY,imm16 4 0xfd,0x21 imm16 Z80,R800
+LD dd,imm16 3 0x01 ld16 Z80,R800,GB80
+LD IX,imm16 4 0xdd,0x21 ld16 Z80,R800
+LD IY,imm16 4 0xfd,0x21 ld16 Z80,R800
-LD HL,(n) 3 0x2a dir Z80,R800,GB80
-LD dd,(n) 4 0xed,0x4b r16_dir Z80,R800
-LD IX,(n) 4 0xdd,0x2a dir Z80,R800
-LD IY,(n) 4 0xfd,0x2a dir Z80,R800
+LD HL,(n) 3 0x2a ld16 Z80,R800,GB80
+LD dd,(n) 4 0xed,0x4b ld16 Z80,R800
+LD IX,(n) 4 0xdd,0x2a ld16 Z80,R800
+LD IY,(n) 4 0xfd,0x2a ld16 Z80,R800
-LD (n),HL 3 0x22 dir Z80,R800,GB80
-LD (n),dd 4 0xed,0x43 r16_dir Z80,R800
-LD (n),IX 4 0xdd,0x22 dir Z80,R800
-LD (n),IY 4 0xfd,0x22 dir Z80,R800
+LD (n),HL 3 0x22 ld16 Z80,R800,GB80
+LD (n),dd 4 0xed,0x43 ld16 Z80,R800
+LD (n),IX 4 0xdd,0x22 ld16 Z80,R800
+LD (n),IY 4 0xfd,0x22 ld16 Z80,R800
LD SP,HL 1 0xf9 noargs Z80,R800,GB80
LD SP,IX 2 0xdd,0xf9 noargs Z80,R800