ref: 5dd867285e5e00dc91a09feb6440b75726e02a82
parent: 62c82ec73e2655936fa467754271563b9a6e5cb3
author: Roberto E. Vargas Caballero <k0ga@shike2.com>
date: Mon Dec 18 08:50:54 EST 2017
[as-z80] Add bit manipulation group
--- a/as/target/gen.awk
+++ b/as/target/gen.awk
@@ -75,6 +75,8 @@
out = out "AIMM32"
} else if (match(a, /^imm64/)) {out = out "AIMM64"
+ } else if (match(a, /^imm3/)) {+ out = out "AIMM3"
} else if (match(a, /^\(IY\+n\)/)) {out = out "AINDEX_IY"
} else if (match(a, /^\(IX\+n\)/)) {--- a/as/target/x80/ins.c
+++ b/as/target/x80/ins.c
@@ -338,3 +338,31 @@
/* TODO */
abort();
}
+
+void
+r_bit(Op *op, Node **args)
+{+ /* TODO */
+ abort();
+}
+
+void
+r_idx_bit(Op *op, Node **args)
+{+ /* TODO */
+ abort();
+}
+
+void
+bit(Op *op, Node **args)
+{+ /* TODO */
+ abort();
+}
+
+void
+idx_bit(Op *op, Node **args)
+{+ /* TODO */
+ abort();
+}
--- a/as/target/x80/proc.h
+++ b/as/target/x80/proc.h
@@ -44,6 +44,8 @@
AINDER_DE, /* (DE) */
AINDER_BC, /* (BC) */
AINDER_SP, /* (SP) */
+
+ AIMM3, /* 3 bit immediate */
};
extern int rclass(int reg);
--- a/as/target/x80/x80.dat
+++ b/as/target/x80/x80.dat
@@ -300,3 +300,23 @@
SRL (IY+n) 4 0xfd,0xcb,0x3e idx Z80,R800
SRL (IX+n),r 4 0xdd,0xcb,0,0x38 idx_r8 Z80,R800
SRL (IY+n),r 4 0xfd,0xcb,0,0x38 idx_r8 Z80,R800
+
+# Bit manipulation group
+BIT imm3,r 2 0xcb,0x40 r_bit Z80,R800
+BIT imm3,(HL) 2 0xcb,0x46 bit Z80,R800
+BIT imm3,(IX+n) 4 0xdd,0xcb,0,0x46 idx_bit Z80,R800
+BIT imm3,(IY+n) 4 0xfd,0xcb,0,0x46 idx_bit Z80,R800
+
+SET imm3,r 2 0xcb,0xc0 r_bit Z80,R800
+SET imm3,(HL) 2 0xcb,0xc6 bit Z80,R800
+SET imm3,(IX+n) 4 0xdd,0xcb,0,0xc6 idx_bit Z80,R800
+SET imm3,(IY+n) 4 0xfd,0xcb,0,0xc6 idx_bit Z80,R800
+SET imm3,(IX+n),r 4 0xdd,0xcb,0,0xc0 r_idx_bit Z80,R800
+SET imm3,(IY+n),r 4 0xfd,0xcb,0,0xc0 r_idx_bit Z80,R800
+
+RES imm3,r 2 0xcb,0x80 r_bit Z80,R800
+RES imm3,(HL) 2 0xcb,0x86 bit Z80,R800
+RES imm3,(IX+n) 4 0xdd,0xcb,0,0x86 idx_bit Z80,R800
+RES imm3,(IY+n) 4 0xfd,0xcb,0,0x86 idx_bit Z80,R800
+RES imm3,(IX+n),r 4 0xdd,0xcb,0,0x80 r_idx_bit Z80,R800
+RES imm3,(IY+n),r 4 0xfd,0xcb,0,0x80 r_idx_bit Z80,R800
--- a/as/target/z80/proc.c
+++ b/as/target/z80/proc.c
@@ -133,6 +133,7 @@
if (np->left->left->sym->argtype != arg)
return 0;
break;
+ case AIMM3:
case AIMM8:
case AIMM16:
case AIMM32: