ref: 2c38592ec6198cbfcca538d05d86b0b11974dc85
parent: 49794235cdce76826a76838c0cc8151d3ae644d7
parent: 524ee737ea074e5fe29d60b61edaf8b397d3b10b
author: Sai Deng <sdeng@google.com>
date: Mon Apr 29 19:38:30 EDT 2019
Merge "Call set_error_per_bit in SSIM rdmult update"
--- a/vp9/encoder/vp9_encodeframe.c
+++ b/vp9/encoder/vp9_encodeframe.c
@@ -257,8 +257,8 @@
x->mbmi_ext = x->mbmi_ext_base + (mi_row * cm->mi_cols + mi_col);
}
-static void set_ssim_rdmult(VP9_COMP *const cpi, int mi_row, int mi_col,
- int *rdmult) {
+static void set_ssim_rdmult(VP9_COMP *const cpi, MACROBLOCK *const x,
+ int mi_row, int mi_col, int *rdmult) {
const VP9_COMMON *const cm = &cpi->common;
// SSIM rdmult scaling factors are currently 64x64 based.
@@ -273,6 +273,7 @@
*rdmult =
(int)((double)(*rdmult) * cpi->mi_ssim_rdmult_scaling_factors[index]);
*rdmult = VPXMAX(*rdmult, 1);
+ set_error_per_bit(x, *rdmult);
vpx_clear_system_state();
}
@@ -312,7 +313,7 @@
x->rddiv = cpi->rd.RDDIV;
x->rdmult = cpi->rd.RDMULT;
if (oxcf->tuning == VP8_TUNE_SSIM) {
- set_ssim_rdmult(cpi, mi_row, mi_col, &x->rdmult);
+ set_ssim_rdmult(cpi, x, mi_row, mi_col, &x->rdmult);
}
// required by vp9_append_sub8x8_mvs_for_idx() and vp9_find_best_ref_mvs()
@@ -1961,7 +1962,7 @@
}
if (oxcf->tuning == VP8_TUNE_SSIM) {
- set_ssim_rdmult(cpi, mi_row, mi_col, &x->rdmult);
+ set_ssim_rdmult(cpi, x, mi_row, mi_col, &x->rdmult);
}
}
@@ -2204,7 +2205,7 @@
const VP9EncoderConfig *const oxcf = &cpi->oxcf;
x->rdmult = x->cb_rdmult;
if (oxcf->tuning == VP8_TUNE_SSIM) {
- set_ssim_rdmult(cpi, mi_row, mi_col, &x->rdmult);
+ set_ssim_rdmult(cpi, x, mi_row, mi_col, &x->rdmult);
}
}
@@ -3817,7 +3818,7 @@
int partition_mul = x->cb_rdmult;
if (oxcf->tuning == VP8_TUNE_SSIM) {
- set_ssim_rdmult(cpi, mi_row, mi_col, &partition_mul);
+ set_ssim_rdmult(cpi, x, mi_row, mi_col, &partition_mul);
}
(void)*tp_orig;