ref: 1000e07609f9136559148629ced67c170cb0218e
parent: c13aaf7a3e245315d88245a710f89d14694bc56f
parent: 60a3cb9ad840377d46286bfd703c30a4a4ee56e2
author: Johann Koenig <johannkoenig@google.com>
date: Fri Mar 23 09:23:58 EDT 2018
Merge "remove fldcw/fstcw from Win64 builds"
--- a/vpx_ports/float_control_word.asm
+++ /dev/null
@@ -1,33 +1,0 @@
-;
-; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
-;
-; Use of this source code is governed by a BSD-style license
-; that can be found in the LICENSE file in the root of the source
-; tree. An additional intellectual property rights grant can be found
-; in the file PATENTS. All contributing project authors may
-; be found in the AUTHORS file in the root of the source tree.
-;
-
-
-%include "vpx_ports/x86_abi_support.asm"
-
-section .text
-
-%if LIBVPX_YASM_WIN64
-global sym(vpx_winx64_fldcw) PRIVATE
-sym(vpx_winx64_fldcw):
- sub rsp, 8
- mov [rsp], rcx ; win x64 specific
- fldcw [rsp]
- add rsp, 8
- ret
-
-
-global sym(vpx_winx64_fstcw) PRIVATE
-sym(vpx_winx64_fstcw):
- sub rsp, 8
- fstcw [rsp]
- mov rax, [rsp]
- add rsp, 8
- ret
-%endif
--- a/vpx_ports/vpx_ports.mk
+++ b/vpx_ports/vpx_ports.mk
@@ -21,10 +21,6 @@
PORTS_SRCS-$(HAVE_MMX) += emms_mmx.c
endif
-ifeq ($(ARCH_X86_64),yes)
-PORTS_SRCS-$(CONFIG_MSVS) += float_control_word.asm
-endif
-
ifeq ($(ARCH_X86)$(ARCH_X86_64),yes)
PORTS_SRCS-yes += x86.h
PORTS_SRCS-yes += x86_abi_support.asm
--- a/vpx_ports/x86.h
+++ b/vpx_ports/x86.h
@@ -295,11 +295,11 @@
return mode;
}
#elif ARCH_X86_64
-/* No fldcw intrinsics on Windows x64, punt to external asm */
-extern void vpx_winx64_fldcw(unsigned short mode);
-extern unsigned short vpx_winx64_fstcw(void);
-#define x87_set_control_word vpx_winx64_fldcw
-#define x87_get_control_word vpx_winx64_fstcw
+// Unsupported on Win64:
+// https://docs.microsoft.com/en-us/cpp/c-runtime-library/reference/control87-controlfp-control87-2
+// _MCW_PC (Precision control) (Not supported on ARM or x64 platforms.)
+static void x87_set_control_word(unsigned int mode) { (void)mode; }+static unsigned int x87_get_control_word(void) { return 0; }#else
static void x87_set_control_word(unsigned short mode) { __asm { fldcw mode }@@ -313,6 +313,17 @@
static INLINE unsigned int x87_set_double_precision(void) {unsigned int mode = x87_get_control_word();
+ // Intel 64 and IA-32 Architectures Developer's Manual: Vol. 1
+ // https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf
+ // 8.1.5.2 Precision Control Field
+ // Bits 8 and 9 (0x300) of the x87 FPU Control Word ("Precision Control")+ // determine the number of bits used in floating point calculations. To match
+ // later SSE instructions restrict x87 operations to Double Precision (0x200).
+ // Precision PC Field
+ // Single Precision (24-Bits) 00B
+ // Reserved 01B
+ // Double Precision (53-Bits) 10B
+ // Extended Precision (64-Bits) 11B
x87_set_control_word((mode & ~0x300) | 0x200);
return mode;
}