ref: e4208e853ab4bac2148bc75049a3902ca5cb4ad7
parent: d4c5ad493bebcb67aa3c6779b2ce7ffe20fd2018
author: Jean-Baptiste Kempf <jb@videolan.org>
date: Mon Feb 10 16:19:08 EST 2020
NEWS: Official naming is AVX2, not AVX-2
--- a/NEWS
+++ b/NEWS
@@ -50,7 +50,7 @@
- NEON optimizations for CDEF and warp on ARM32
- SSE2 optimizations for MSAC hi_tok decoding
- SSSE3 optimizations for deblocking loopfilters and warp_affine
- - AVX-2 optimizations for film grain and ipred_z2
+ - AVX2 optimizations for film grain and ipred_z2
- SSE4 optimizations for warp_affine
- VSX optimizations for wiener
- Fix inverse transform overflows in x86 and NEON asm
@@ -99,7 +99,7 @@
-----------------------------
- Large improvement on MSAC decoding with SSE, bringing 4-6% speed increase
- The impact is important on SSSE3, SSE4 and AVX-2 cpus
+ The impact is important on SSSE3, SSE4 and AVX2 cpus
- SSSE3 optimizations for all blocks size in itx
- SSSE3 optimizations for ipred_paeth and ipred_cfl (420, 422 and 444)
- Speed improvements on CDEF for SSE4 CPUs
@@ -111,7 +111,7 @@
----------------------------
- SSSE3 optimization for cdef_dir
- - AVX-2 improvements of the existing CDEF optimizations
+ - AVX2 improvements of the existing CDEF optimizations
- NEON improvements of the existing CDEF and wiener optimizations
- Clarification about the numbering/versionning scheme
@@ -121,7 +121,7 @@
- ARM64 and ARM optimizations using NEON instructions
- SSSE3 optimizations for both 32 and 64bits
- - More AVX-2 assembly, reaching almost completion
+ - More AVX2 assembly, reaching almost completion
- Fix installation of includes
- Rewrite inverse transforms to avoid overflows
- Snap packaging for Linux
@@ -136,6 +136,6 @@
- Support for all features of the AV1 bitstream
- Support for all bitdepth, 8, 10 and 12bits
- Support for all chroma subsamplings 4:2:0, 4:2:2, 4:4:4 *and* grayscale
- - Full acceleration for AVX-2 64bits processors, making it the fastest decoder
+ - Full acceleration for AVX2 64bits processors, making it the fastest decoder
- Partial acceleration for SSSE3 processors
- Partial acceleration for NEON processors