ref: 6dd7fd3086ffa8c87a35c955ddaed3e9fa0e292d
parent: 5f2f37dec38fb803426cd3c2b208766f5af206ee
author: Sigrid Haflínudóttir <ftrvxmtrx@gmail.com>
date: Sun Sep 6 12:38:45 EDT 2020
provide amd64-specific ctz, clz and clzll builtins
--- a/src/mkfile
+++ b/src/mkfile
@@ -47,7 +47,7 @@
msac.$O\
obu.$O\
picture.$O\
- plan9_builtins.$O\
+ plan9_builtins_$objtype.$O\
plan9_thread.$O\
qm.$O\
recon_tmpl.$O\
--- a/src/plan9_builtins.c
+++ b/src/plan9_builtins.c
@@ -1,5 +1,3 @@
-/* FIXME bring back amd64 assembly for this */
-
int
__builtin_ctz(unsigned int x)
{--- /dev/null
+++ b/src/plan9_builtins_amd64.s
@@ -1,0 +1,13 @@
+TEXT __builtin_ctz(SB),$0
+ BYTE $0x0F; BYTE $0xBC; BYTE $0xC5 /* BSFL RARG, AX */
+ RET
+
+TEXT __builtin_clz(SB),$0
+ BYTE $0x0F; BYTE $0xBD; BYTE $0xC5 /* BSRL RARG, AX */
+ XORL $31, AX
+ RET
+
+TEXT __builtin_clzll(SB),$0
+ BYTE $0x48; BYTE $0x0F; BYTE $0xBD; BYTE $0xC5 /* BSRQ RARG, AX */
+ XORL $63, AX
+ RET