ref: d8ab83e060bf9bb6b1d51915d63578a6dc8cacaf
parent: f3c2e7e1dd1b95d4eb1c4dbf7e617c27c1a2b10f
author: rodri <rgl@antares-labs.eu>
date: Thu Nov 23 11:50:05 EST 2023
add base VEX encoding definitions.
--- a/sse.h
+++ b/sse.h
@@ -15,15 +15,13 @@
#define rX5 5
#define rX6 6
-#define OP(o, m, ro, rm) WORD $0x0F66; /* op + modr/m byte */ \
- BYTE $(o); \
+#define OP(o, m, ro, rm) WORD $0x0F66; BYTE $(o); \
BYTE $(((m)<<6)|((ro)<<3)|(rm))
-#define OPi(o, m, ro, rm, i) OP((o), (m), (ro), (rm)); \
+#define OPi(o, m, ro, rm, i) OP((o), (m), (ro), (rm)); \
BYTE $(i)
-#define OP4(o, m, ro, rm) WORD $0x0F66; \
- WORD $(o); \
+#define OP4(o, m, ro, rm) LONG $0x(o)0F66; \
BYTE $(((m)<<6)|((ro)<<3)|(rm))
-#define OP4i(o, m, ro, rm, i) OP4((o), (m), (ro), (rm)); \
+#define OP4i(o, m, ro, rm, i) OP4((o), (m), (ro), (rm)); \
BYTE $(i)
/* MOVLPD */
@@ -48,3 +46,21 @@
//modrm = 11 000 001 [X1 → X0]
//imm8 = 0011 0001
#define DPPD(s, d) OP4i(0x413A, 0x3, (d), (s), 0x31)
+
+
+#define VEX_m_0F (1)
+#define VEX_m_0F38 (2)
+#define VEX_m_0F3A (3)
+#define VEX_L_128 (0)
+#define VEX_L_256 (1)
+#define VEX_p_NO (0)
+#define VEX_p_66 (1)
+#define VEX_p_F3 (2)
+#define VEX_p_F2 (3)
+
+#define VEX2(r, x, b, m, w, v, l, p) BYTE $0xC5; \
+ BYTE $(((~r)<<7)|((~x)<<6)|((~b)<<5)|(m)); \
+ BYTE $(((w)<<7)|((~v)<<3)|((l)<<2)|(p));
+
+#define VEX3(r, b, l, p) BYTE $0xC4; \
+ BYTE $(((~r)<<7)|((~v)<<3)|((l)<<2)|(p));