shithub: riscv

Download patch

ref: ac00f0df739a5a0af1c75b00d3f607cbc5c12ad3
parent: 6d238d63882b2287abdb6c11236994c2ddd899f7
author: Jacob Moody <moody@posixcafe.org>
date: Sat May 4 14:42:22 EDT 2024

libmach: remove unused jc subdir

diff: cannot open a/sys/src/libmach/jc//null: file does not exist: 'a/sys/src/libmach/jc//null'
--- a/sys/src/libmach/jc/enam.c
+++ /dev/null
@@ -1,117 +1,0 @@
-char*	anames[] =
-{
-	"XXX",
-	"ADD",
-	"ADDW",
-	"AMO_D",
-	"AMO_W",
-	"AND",
-	"BEQ",
-	"BGE",
-	"BGEU",
-	"BLT",
-	"BLTU",
-	"BNE",
-	"CSRRC",
-	"CSRRCI",
-	"CSRRS",
-	"CSRRSI",
-	"CSRRW",
-	"CSRRWI",
-	"DIV",
-	"DIVU",
-	"DIVUW",
-	"DIVW",
-	"FENCE",
-	"FENCE_I",
-	"JAL",
-	"JALR",
-	"LR_D",
-	"LR_W",
-	"LUI",
-	"MOVB",
-	"MOVBU",
-	"MOVH",
-	"MOVHU",
-	"MOV",
-	"MOVW",
-	"MOVWU",
-	"MUL",
-	"MULH",
-	"MULHSU",
-	"MULHU",
-	"MULW",
-	"OR",
-	"REM",
-	"REMU",
-	"REMUW",
-	"REMW",
-	"SC_D",
-	"SC_W",
-	"SLL",
-	"SLLW",
-	"SLT",
-	"SLTU",
-	"SRA",
-	"SRAW",
-	"SRL",
-	"SRLW",
-	"SUB",
-	"SUBW",
-	"SWAP_D",
-	"SWAP_W",
-	"SYS",
-	"XOR",
-	"MOVF",
-	"MOVD",
-	"MOVFD",
-	"MOVDF",
-	"MOVWF",
-	"MOVUF",
-	"MOVFW",
-	"MOVWD",
-	"MOVUD",
-	"MOVDW",
-	"ADDF",
-	"ADDD",
-	"SUBF",
-	"SUBD",
-	"MULF",
-	"MULD",
-	"DIVF",
-	"DIVD",
-	"CMPLTF",
-	"CMPLTD",
-	"CMPEQF",
-	"CMPEQD",
-	"CMPLEF",
-	"CMPLED",
-	"BGT",
-	"BGTU",
-	"BLE",
-	"BLEU",
-	"SGT",
-	"SGTU",
-	"JMP",
-	"RET",
-	"NOP",
-	"DATA",
-	"GLOBL",
-	"GOK",
-	"HISTORY",
-	"NAME",
-	"TEXT",
-	"WORD",
-	"END",
-	"DYNT",
-	"INIT",
-	"SIGNAME",
-	"DWORD",
-	"MOVFV",
-	"MOVDV",
-	"MOVVF",
-	"MOVUVF",
-	"MOVVD",
-	"MOVUVD",
-	"LAST",
-};
--- a/sys/src/libmach/jc/j.out.h
+++ /dev/null
@@ -1,225 +1,0 @@
-#define	NSNAME	8
-#define	NSYM	50
-#define	NREG	32
-#define NOPROF	(1<<0)
-#define DUPOK	(1<<1)
-
-/*
- * Register roles are influenced by the compressed extension:
- *	CIW, CL, CS and CB format use only R8-R15
- *	CL and CS floating load/store use only F8-F15
- *	CI and CSS load/store assume stack pointer is R2
- *	C.JAL assumes link register is R1
- */
-enum
-{
-	REGZERO		= 0,	/* always zero */
-	REGLINK		= 1,	/* call return address */
-	REGSP		= 2,	/* stack pointer */
-	REGSB		= 3,	/* static base */
-	REGTMP		= 4,	/* assembler temporary */
-	REGEXT		= 7,	/* extern reg from here down */
-	REGRET		= 8,	/* fn return value */
-	REGARG		= 8,	/* fn arg value */
-	REGLOWALLOC	= 9,	/* first reg to allocate */
-	REGALLOC	= 31,	/* highest reg to allocate (15 for RV32E) */
-
-	FREGRET		= 0,	/* fn return value */
-	FREGEXT		= 27,	/* extern reg from here down */
-	FREGZERO	= 28,
-	FREGHALF	= 29,
-	FREGONE		= 30,
-	FREGTWO		= 31,
-};
-
-enum	as
-{
-	AXXX = 0,
-
-	/* processor instructions */
-	AADD,
-	AADDW,
-	AAMO_D,
-	AAMO_W,
-	AAND,
-	ABEQ,
-	ABGE,
-	ABGEU,
-	ABLT,
-	ABLTU,
-	ABNE,
-	ACSRRC,
-	ACSRRCI,
-	ACSRRS,
-	ACSRRSI,
-	ACSRRW,
-	ACSRRWI,
-	ADIV,
-	ADIVU,
-	ADIVUW,
-	ADIVW,
-	AFENCE,
-	AFENCE_I,
-	AJAL,
-	AJALR,
-	ALR_D,
-	ALR_W,
-	ALUI,
-	AMOVB,
-	AMOVBU,
-	AMOVH,
-	AMOVHU,
-	AMOV,
-	AMOVW,
-	AMOVWU,
-	AMUL,
-	AMULH,
-	AMULHSU,
-	AMULHU,
-	AMULW,
-	AOR,
-	AREM,
-	AREMU,
-	AREMUW,
-	AREMW,
-	ASC_D,
-	ASC_W,
-	ASLL,
-	ASLLW,
-	ASLT,
-	ASLTU,
-	ASRA,
-	ASRAW,
-	ASRL,
-	ASRLW,
-	ASUB,
-	ASUBW,
-	ASWAP_D,
-	ASWAP_W,
-	ASYS,
-	AXOR,
-
-	/* floating point */
-	AMOVF,      /* FLW, FSW, FSGNJ.S */
-	AMOVD,      /* FLD, FSD, FSGNJ.D */
-	AMOVFD,     /* FCVT.D.S */
-	AMOVDF,     /* FCVT.S.D */
-	AMOVWF,     /* FCVT.S.W */
-	AMOVUF,     /* FCVT.S.WU */
-	AMOVFW,     /* FCVT.W.S */
-	AMOVWD,     /* FCVT.D.W */
-	AMOVUD,     /* FCVT.D.WU */
-	AMOVDW,     /* FCVT.W.D */
-	AADDF,      /* FADD.S */
-	AADDD,      /* FADD.D */
-	ASUBF,      /* FSUB.S */
-	ASUBD,      /* FSUB.D */
-	AMULF,      /* FMUL.S */
-	AMULD,      /* FMUL.D */
-	ADIVF,      /* FDIV.S */
-	ADIVD,      /* FDIV.D */
-	ACMPLTF,     /* FLT.S */
-	ACMPLTD,     /* FLT.D */
-	ACMPEQF,     /* FEQ.S */
-	ACMPEQD,     /* FEQ.D */
-	ACMPLEF,     /* FLE.S */
-	ACMPLED,     /* FLE.S */
-
-	/* floating point instructions not included */
-/*
-	FMADD.S    FMADD.D
-	FMSUB.S    FMSUB.D
-	FNMSUB.S   FNMSUB.D
-	FNMADD.S   FNMADD.D
-	FSQRT.S    FSQRT.D
-	FSGNJ.S    FSGNJ.D
-	FSGNJN.S   FSGNJN.D
-	FSGNNX.S   FSGNNX.D
-	FMIN.S     FMIN.D
-	FMAX.S     FMAX.D
-	FMV.X.W
-	FCLASS.S   FCLASS.D
-	FCVT.WU.S  FCVT.WU.D
-	FMV.W.X
- */
-
-
-	/* pseudo-ops */
-	ABGT,
-	ABGTU,
-	ABLE,
-	ABLEU,
-	ASGT,
-	ASGTU,
-	AJMP,
-	ARET,
-	ANOP,
-
-	/* C compiler pseudo-ops */
-	ADATA,
-	AGLOBL,
-	AGOK,
-	AHISTORY,
-	ANAME,
-	ATEXT,
-	AWORD,
-	AEND,
-	ADYNT,
-	AINIT,
-	ASIGNAME,
-
-	/* RV64 extension */
-	ADWORD,
-	AMOVFV,
-	AMOVDV,
-	AMOVVF,
-	AMOVUVF,
-	AMOVVD,
-	AMOVUVD,
-
-	ALAST,
-};
-
-/* type/name */
-enum
-{
-	D_GOK	= 0,
-	D_NONE,
-
-/* name */
-	D_EXTERN,
-	D_STATIC,
-	D_AUTO,
-	D_PARAM,
-
-/* type */
-	D_BRANCH,
-	D_OREG,
-	D_CONST,
-	D_FCONST,
-	D_SCONST,
-	D_REG,
-	D_CTLREG,
-	D_FREG,
-	D_FCREG,
-	D_FILE,
-	D_FILE1,
-	D_VCONST,
-};
-
-/*
- * this is the ranlib header
- */
-#define	SYMDEF	"__.SYMDEF"
-
-/*
- * this is the simulated IEEE floating point
- */
-typedef	struct	ieee	Ieee;
-struct	ieee
-{
-	long	l;	/* contains ls-man	0xffffffff */
-	long	h;	/* contains sign	0x80000000
-				    exp		0x7ff00000
-				    ms-man	0x000fffff */
-};