shithub: riscv

Info  •  Files  •  Log  •  Branches

bcm64, imx8: writing CAPR_EL1 (to turn fpu on/off) needs a intruction barrier

Cortex A72 traps on setfcr() right after fpon()...
I was never sure if it was required or not,
and it worked fine without for A53. Theres
no synchronisation requireents for CAPR_EL1
in the arm documentation eigther... :(

Anyway, this fixes it... (needed for new fpu code).

--- a/sys/src/9/bcm64/l.s

+++ b/sys/src/9/bcm64/l.s

@@ -392,11 +392,13 @@

 TEXT fpon(SB), 1, $-4

 	MOVW $(3<<20), R0

 	MSR R0, CPACR_EL1

+	ISB	$SY

 	RETURN

 TEXT fpoff(SB), 1, $-4

 	MOVW $(0<<20), R0

 	MSR R0, CPACR_EL1

+	ISB	$SY

 	RETURN

 TEXT fpsaveregs(SB), 1, $-4

--- a/sys/src/9/imx8/l.s

+++ b/sys/src/9/imx8/l.s

@@ -404,11 +404,13 @@

 TEXT fpon(SB), 1, $-4

 	MOVW $(3<<20), R0

 	MSR R0, CPACR_EL1

+	ISB $SY

 	RETURN

 TEXT fpoff(SB), 1, $-4

 	MOVW $(0<<20), R0

 	MSR R0, CPACR_EL1

+	ISB $SY

 	RETURN

 TEXT fpsaveregs(SB), 1, $-4