shithub: opus

0e2d56d6 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/02/02 09:46

Add missing NULL pointer check

009d7412 – luzpaz <luzpaz@users.noreply.github.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/07/21 12:19

Fix various typos

f20575dd – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/31 16:52

Fix OSCE using uninitialized range coder for PLC

53c2313c – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/31 13:30

Fix lossgen shared build

6c8acc21 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/31 08:08

Avoid padding multi-frame DTX packets

648a9f24 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/31 08:07

Allow for DRED in DTX refresh packets

43508197 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/31 07:59

Handle the offset from the DRED frame id

f4ee2925 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/30 19:02

Fix frame separator parsing

0fed741a – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/30 16:53

Fix c90 build

468a693d – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/21 09:10

Cleanup previous commits

b778271d – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/16 08:01

divide max payload too

073bec91 – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/15 22:52

First shot at multi-frame CBR with DRED

fe86db66 – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/17 14:03

More activity handling to opus_encode_native_process()

452abeea – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/17 13:49

Handle rangeFinal, delay_compensation

fd88e223 – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/15 20:54

Refactor multi-frame encoding to be non-recursive

f44069f5 – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/15 12:48

Splitting opus_encode_native()

231caa37 – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/19 17:12

Fix Hybrid CBR with DRED and CELT->SILK redundancy

b63e22cf – Jean-Marc Valin <jmvalin@amazon.com> authored and Jean-Marc Valin <jmvalin@jmvalin.ca> committed on 2023/12/18 20:55

Fix desync for CBR DRED

7b73c9bc – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/23 14:22

More DRED tuning

19dd96b3 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/21 22:29

Initial DRED tuning

7df2c67b – Jan Buethe <jbuethe@amazon.de> authored on 2024/01/23 12:10

fixes in osce python code

3499d0aa – Jan Buethe <jbuethe@amazon.de> authored on 2024/01/22 10:23

switched to smaller NoLACE model

ec04a94e – Jan Buethe <jbuethe@amazon.de> authored on 2024/01/22 10:12

bugfix in SilkFeatureNetPL

5f8201c7 – Jan Buethe <jbuethe@amazon.de> authored on 2024/01/22 10:12

OSCE_MAX_RNN_UNITS now derived from osce model parameters

6a9831a6 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/18 13:16

Remove run-time code for old TF2 models

1ddfcfd4 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/17 10:15

Using PyTorch model (same architecture for now)

e6992636 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/15 13:24

Improving PLC

299e38ca – Jan Buethe <jbuethe@amazon.de> authored on 2023/12/18 07:19

Updated LACE and NoLACE models to version 2

4f311a1a – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2024/01/16 21:26

PLC export script

26ddfd71 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2024/01/15 13:10

PyTorch code for training the PLC model

6ad03ae0 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/12/22 15:14

Prevent overshoots from CELT PLC with prediction

bd2e9a34 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/21 18:36

Add simulated loss to opus_demo

caca188b – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/21 18:05

Make loss simulator standalone

bd710e97 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/21 16:30

C code for packet loss simulator

b923fd1e – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/21 13:01

lossgen: better training, README.md

c40add59 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/21 11:57

lossgen: can now dump weights

627aa7f5 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/21 10:34

Packet loss generation model

7d328f5b – Jan Buethe <jbuethe@amazon.de> authored and Jean-Marc Valin <jmvalin@amazon.com> committed on 2023/11/08 09:03

Merge LACE/NoLACE under OSCE framework

591c8bad – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/16 17:04

Initialize padding pointers to zero

12fbd811 – Michael Klingbeil <klingm@amazon.com> authored on 2023/12/15 10:48

use opus_(re)alloc and opus_free for dnn and DRED related functions

f5a1efdc – Michael Klingbeil <klingm@amazon.com> authored on 2023/12/13 16:39

handle extensions in opus_repacketizer_out_range_impl

6d7ae213 – Michael Klingbeil <klingm@amazon.com> authored on 2023/12/05 15:43

add extensions of the first frame of a multiframe packet

f27798da – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/12/05 11:58

Fix RESYNTH bit rot

c7bfc72d – Michael Klingbeil <klingm@amazon.com> authored on 2023/11/29 16:40

use vec_avx.h for MSVC builds

8090aaca – Michael Klingbeil <klingm@amazon.com> authored on 2023/11/29 15:02

don't redefine _mm_loadu_si32 on MSVC

88fc2937 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/29 13:17

Defining __SSEx__ macros when needed for MSVC

f126bfc5 – Michael Klingbeil <klingm@amazon.com> authored on 2023/11/29 08:38

fix autogen.bat model download

0d823c13 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/28 21:50

Add a script to shrink the DNN models

443510c2 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/28 18:49

Fix Windows path

55788242 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/28 18:39

Fix model download path for windows

ddfa4804 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/28 18:32

Opus github ci files

08eefed7 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/28 18:18

Add dotprod support to meson

c28b0f10 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/28 14:14

Trying to fix/update meson build

147b7229 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/28 10:34

Oops, fix the fixed-point build

db26e381 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/28 09:16

Trying to use fma instructions when possible

72cc88df – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/27 23:11

FARGAN model update

df637713 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/27 17:57

Fixes for ARMv7/AArch32

c143b72c – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/27 13:08

Enabling DNN optimizations for ARMv7

ee1bb69f – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/27 12:55

Only force auto-vectorization for GCC >= 5.1

7cc30ec6 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/27 11:44

Force vectorization for DNN primitives

d4506af5 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/27 10:41

Enable floating-point approximations by default

db6dad44 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/26 17:21

Fix ARMv7 optimizations for DNN code

cc11c078 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/25 22:36

First step towards DNN optimization for ARMv7 Neon

c9af8f80 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/25 22:16

Fix potential read out of bounds in fargan

5c3795b2 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/22 14:05

Adding dotprod instruction to ARM rtcd

984f35b3 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/24 13:28

Speed up cross-correlation normalization

d65b7de3 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/24 13:08

Use arch-specific celt_inner_prod() for features

ddbdbec4 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/24 13:02

Optimize biquad() to reduce dependency chains

176507e4 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/24 08:33

Remove process_single_frame()

9d0425d8 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/24 08:23

Remove feature writing (fwrite()) from libopus

f5821193 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/21 11:59

Using the same condition for enabling rtcd

3e18d967 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/21 11:13

Trying to fix CMake build

239d223d – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 21:56

Add rtcd for silk_inner_product_FLP()

b93e4a14 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 21:13

Start enabling AVX2 silk_inner_product_FLP()

ed900603 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 20:26

Avoids AVX2 optimizations being disabled

c066af1b – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 20:13

Use SILK VBR when using CBR with DRED

6f99a338 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/17 20:39

Misc fixes on previous patch

735c4070 – Victor Ding <victording@google.com> authored and Jean-Marc Valin <jmvalin@amazon.com> committed on 2023/11/17 18:58

Optimize NSQ_del_dec() for AVX2

452aa952 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 12:53

AVX2 version of silk_inner_product_FLP()

10851260 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 11:18

Remove AVX pitch code for fixed-point

161358d6 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 11:12

Speeding up transient_analysis()

f42940be – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/20 09:13

Make sure weights files are marked as modified

d4b04d32 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/17 18:10

Speed up silk_warped_autocorrelation_FLP()

b2cfd877 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/17 14:36

Add rtcd support for celt_pitch_xcorr_avx2()

02938546 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/17 13:08

Fix non-RTCD case when SSE is not assumed present

7423ce59 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/17 11:59

Use celt_pitch_xcorr_avx2() when guaranteed

a93b09e2 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/17 09:14

Adding RTCD for compute_conv2d()

91d1f753 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/16 07:45

FARGAN model update

7f7b2a1c – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/15 07:58

Smaller version of fargan

19a5d6ec – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/15 20:27

Remove C99 comment

4bfc0f85 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/14 12:54

Adding RTCD for compute_activation()

2e034f6f – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/13 13:26

Adding RTCD for DNN code

b0620c0b – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/14 23:08

Using sparse GRUs in DRED decoder

58923f61 – Jean-Marc Valin <jmvalin@jmvalin.ca> authored on 2023/11/10 22:22

Fix non-AVX builds

77594bf1 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/08 12:32

Dumping RDOVAE stats from XML

222662da – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/07 12:46

DRED: quantize scale and dead zone to 8 bits

4e104555 – Jan Buethe <jbuethe@amazon.de> authored on 2023/11/07 10:12

added weight export script for LACE/NoLACE

8af5c6b4 – Jan Buethe <jbuethe@amazon.de> authored on 2023/11/07 06:54

added transposed 1d convolutions to wexchange

b6095cf2 – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/06 21:52

DRED code cleanup

0ab0640d – Jean-Marc Valin <jmvalin@amazon.com> authored on 2023/11/06 12:49

Split stats in two and remove useless dimensions