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ref: 39ee8a79d62c0a6e1438e5adf50be02ac50241cc
parent: d0db9e99cb9423f138a3b9e3acc53b142b7c5232
author: Siarhei Volkau <lis8215@gmail.com>
date: Sun Aug 17 13:02:57 EDT 2025

refactor: MIPS: fix silk_CLZ16 port

silk_CLZ16 MIPS port does sign extension from opus_int16 to opus_int32.
In case of negative input it will return -16 instead of expected 0.

Input should be zero extended for mips_clz / __builtin_clz.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Signed-off-by: Jean-Marc Valin <jeanmarcv@google.com>

--- a/silk/mips/macros_mipsr1.h

+++ b/silk/mips/macros_mipsr1.h

@@ -78,9 +78,9 @@

 static inline opus_int32 silk_CLZ16(opus_int16 in16)

 {

     int re32;

-    opus_int32 in32 = (opus_int32 )in16;

+    opus_uint32 in32 = (opus_uint16)in16;

     re32 = mips_clz(in32);

-    re32-=16;

+    re32 -= 16;

     return re32;

 }

-- 

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