ref: 15a34cba8f6a201aff53f976fd2c788660fcbffd
parent: cc6750e43d2ea3fdbadef39bb26d2fa2f2ff3095
author: Siarhei Volkau <lis8215@gmail.com>
date: Wed Aug 27 08:20:27 EDT 2025
MIPS: silk: optimize silk_SMLAWB for MIPS32+ MIPS32 has 32x32=>64bit multiplication, although shifting 64-bit result isn't trivial so its worth to shift right 64-bit value to 32 it means just drop LSB register of the result. Since third argument of silk_SMLAWB is 16-bit wide we can shift it left by 16 before multiplication to apply technique above to the result. Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
--- a/silk/mips/macros_mipsr1.h
+++ b/silk/mips/macros_mipsr1.h
@@ -82,6 +82,15 @@
return ac >> 32;
}
+/* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */
+#undef silk_SMLAWB
+static inline int silk_SMLAWB(int a, int b, int c)
+{+ long long ac = (long long)b * (int)(c << 16);
+
+ return a + (ac >> 32);
+}
+
#endif
#if defined (__mips_isa_rev) /* MIPS32r1+ */
--
⑨